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  general description the max6469?ax6484 are low-dropout linear regula- tors with a fully integrated microprocessor reset circuit. each is available with preset output voltages from +1.5v to +3.3v in 100mv increments and delivers up to 300ma of load current. these devices consume only 82? of supply current. the low supply current, low dropout volt- age, and integrated reset functionality make these devices ideal for battery-powered portable equipment. the max6469?ax6484 include a reset output that indi- cates when the regulator output drops below standard microprocessor supply tolerances (-7.5% or -12.5% of nominal output voltage). this eliminates the need for an external microprocessor supervisor, while ensuring that supply voltages and clock oscillators have stabilized before processor activity is enabled. push-pull and open- drain active-low reset outputs are available, with reset timeout periods of 2.5ms, 20ms, 150ms, or 1200ms (min). the max6469/max6470/max6473?ax6478/max6481 max6484 also have a shutdown feature that reduces the supply current to 0.1? (typ). the max6471?ax6474/ max6479?ax6482 offer a manual reset input to assert a microprocessor reset while the regulator output is within specification. the max6475/max6476/max6483/ max6484 feature a remote feedback sense pin for use with an external npn transistor for higher-current applica- tions. the max6469?ax6476 are available in 6-pin sot23 and 8-pin tdfn packages. the max6477 max6484 are available in a 3 3 chip-scale package (ucsp). all devices are specified for operation from -40? to +85?. applications hand-held instruments (pdas, palmtops) pcmcia cards/usb devices cellular/cordless telephones cd/dvd drives notebook computers digital cameras bluetooth modules/wireless lan features ? 3 ? 3 ucsp, 6-pin sot23, and 8-pin tdfn packages ? preset +1.5v to +3.3v output (100mv increments) ? set pin for adjustable output voltage ? 75? rms ldo output voltage noise (max6477?ax6484) ? ?.0% accuracy over temperature ? guaranteed 300ma output current ? low dropout voltage 55mv at 150ma 114mv at 300ma ? 82? supply current, 0.1? shutdown current ? input reverse current, thermal and short-circuit protection ? microprocessor reset with four timeout options ? push-pull or open-drain reset ? manual reset input ? remote feedback sense max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ________________________________________________________________ maxim integrated products 1 ordering information 19-2532; rev 3; 3/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package max6469 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6469ta_ _ _d_* -40? to +85? 8 tdfn max6470 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6470ta_ _ _d_* -40? to +85? 8 tdfn note: the first ? _ are placeholders for the output voltage levels of the devices. desired output voltages are set by the suffix found in the output voltage suffix guide (table 1). the third ??is a placeholder for the reset threshold accuracy. desired reset threshold accuracy is set by the suffix found in the reset threshold accuracy guide (table 2). the ??following the d is a placeholder for the reset timeout delay time. desired reset timeout delay time is set by the suffix found in the reset timeout delay guide (table 3). for example, the max6481bl30bd4-t has a 3.0v output voltage, 12.5% reset threshold tolerance, and a 1200ms (min) reset timeout delay. sample stock is generally avail- able on standard versions only (table 4). standard versions require a minimum order increment of 2.5k units. nonstandard versions must be ordered in 10k-unit increments. contact factory for availability. ordering information continued at end of data sheet. pin configurations appear at end of data sheet. typical operating circuits appear at end of data sheet. ucsp is a trademark of maxim integrated products, inc. * future product?ontact factory for availability. evaluation kit available
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 2 _______________________________________________________________________________________ absolute maximum ratings (all voltages referenced to gnd, unless otherwise noted.) in, shdn , out, fb ..................................................-0.3v to +7v mr , set .......................................................-0.3v to (v in + 0.3v) reset (push-pull) ...................................-0.3v to (v out + 0.3v) reset (open drain)..................................................-0.3v to +7v out short circuit .......................................................continuous input/output current (all pins except in and out) ............20ma continuous power dissipation (t a = +70?) 3 x 3 ucsp (derate 10.5mw/? above +70?) ............840mw 6-pin sot23 (derate 9.1mw/? above +70?).............727mw 8-pin tdfn (derate 24.4mw/? above +70?) ..............................1951mw operating temperature range ..........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v in = (v out + 0.5v) or +2.5v, whichever is greater, c out = 3.3?, t a = -40? to +85?. typical specifications are at t a = +25?, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units input voltage range v in 2.5 5.5 v input undervoltage lockout v uvlo v in falling 2.25 2.47 v i out = 0 82 136 supply current (ground current) i q i out = 300ma 96 ? shutdown supply current i shdn t a = +25? 0.1 1 a regulator circuit output current 300 ma 1ma i out 150ma, t a = +25? -1.3 +1.3 1ma i out 150ma, t a = -40? to +85? -2.3 +2.3 output voltage accuracy (fixed output voltage operation, table 1) max6469?ax6476 1ma i out 300ma, t a = -40? to +85? -2.7 +2.7 % 2ma i out 100ma, t a = +25? -1.1 +1.1 2ma i out 100ma, t a = -40? to +85? -2.0 +2.0 output voltage accuracy (fixed output voltage operation, table 1) max6477?ax6484 2ma i out 300ma, t a = -40? to +85? (note 3) -2.5 +2.5 % adjustable output voltage range v set 5.0 v set reference voltage v set 1.200 1.229 1.258 v set dual mode tm threshold 185 mv set input leakage current i set v set = 0, +1.2v (note 3) ?0 ?00 na dual mode is a trademark of maxim integrated products, inc. stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: the max6477?ax6484 are constructed using a unique set of packaging techniques that impose a limit on the thermal pro- file the devices can be exposed to during board-level solder attach and rework. this limit permits only the use of the solder profiles recommended in the industry-standard specification, jedec 020a, paragraph 7.6, table 3 for ir/vpr and convection reflow. pre-heating is required. hand or wave soldering is not allowed.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = (v out + 0.5v) or +2.5v, whichever is greater, c out = 3.3?, t a = -40? to +85?. typical specifications are at t a = +25?, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units i out = 50ma 23 32 i out = 150ma 55 90 v out = +3.3v (fixed output operation) i out = 300ma 114 180 i out = 50ma 25 40 i out = 150ma 61 100 v out = +3.0v (fixed output operation) i out = 300ma 114 190 i out = 50ma 26 50 i out = 150ma 65 110 v out = +2.8v (fixed output operation) i out = 300ma 137 210 i out = 50ma 30 60 i out = 150ma 75 150 dropout voltage (notes 3, 4) ? v do v out = +2.5v (fixed output operation) i out = 300ma 158 250 mv output current limit v in 2.5v (note 3) 450 ma input reverse leakage current (out to in leakage current) v in = 4v, v out = 5.5v, shdn deasserted 0.01 1.5 ? startup time response rising edge of v in or shdn to v out within specification, r l = 68 ? , set = gnd, i out = 10ma 20 ? shdn input low voltage v il 0.3 v in v shdn input high voltage v ih 0.7 v in v shdn input current shdn = v in or gnd -1 0.1 +1 ? thermal-shutdown temperature t shdn 180 ? thermal-shutdown hysteresis ? t shdn 20 ? line regulation v out = 1.5v, 2.5v v in 5.5v, i out = 10ma 0.09 %/v load regulation v out = 1.5v, v in = 2.5v, 1ma i out 150ma 0.2 % max6469?ax6476 150 output voltage noise 10hz to 100khz, c in = 0.1?, i out = 100ma, v out = 1.5v max6477?ax6484 75 ? rms reset circuit max64_ _ _ _ _ _ a 90 92.5 95 v out reset threshold (v fb for max6475/max6476/ max6483/max6484) (note 5) v thout max64_ _ _ _ _ _ b 85 87.5 90 %v out v out to reset delay (v fb for max6475/max6476/ max6483/max6484) 35 ? d1 2.5 3.75 5.0 d2 20 30 40 d3 150 225 300 reset timeout period (note 6) t rp d4 1200 1800 2400 ms
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 4 _______________________________________________________________________________________ note 2: all devices are 100% production tested at +25? and are guaranteed by correlation for t a = t min to t max . note 3: guaranteed by design. note 4: dropout voltage is defined as (v in - v out ) when v out is 2% below the value of v out for v in = v out(nom) + 1v. note 5: max6473/max6474/max6481/max6482 are guaranteed by design for v out < 2.5v. note 6: select the reset timeout period using the reset timeout delay guide (table 3). insert the appropriate suffix in the part number when ordering. electrical characteristics (continued) (v in = (v out + 0.5v) or +2.5v, whichever is greater, c out = 3.3?, t a = -40? to +85?. typical specifications are at t a = +25?, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units mr input low voltage v il 0.3 v out v mr input high voltage v ih (note 3) 0.7 mr minimum input pulse 1s mr glitch rejection 120 ns mr to reset delay 200 ns mr pullup resistance mr to out 25 40 70 k ? 1.0v, i sink = 50?, reset asserted 0.3 reset output voltage (open drain) v ol v ou t 1.5v , i s in k = 3.2m a, res et asser ted 0.4 v open-drain reset output leakage current i lkg (note 3) 1a v out 1.0v, i sink = 50?, reset asserted 0.3 v ol v ou t 1.5v , i s in k = 3.2m a, res et asser ted 0.4 reset output voltage push-pull v oh v out 2.0v, i source = 500?, reset deasserted 0.8 ground current vs. input voltage (no load) max6469 toc01 input voltage (v) ground current ( a) 5 4 3 2 1 20 40 60 80 100 120 0 06 +85 c +25 c -40 c ground current vs. input voltage (300ma load) max6469 toc02 input voltage (v) ground current ( a) 20 40 60 80 100 120 0 5 4 3 2 1 06 +85 c +25 c -40 c maximum transient duration vs. reset threshold overdrive max6469 toc03 reset threshold overdrive (mv) pulse duration ( s) 10 25 50 75 100 125 150 0 1 100 reset asserts above this line t ypical operating characteristics (v in = 5v, v out = 3.3v, c out = 3.3?, t a = +25?, unless otherwise noted.)
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit _______________________________________________________________________________________ 5 dropout voltage vs. load current max6469 toc04 load current (ma) dropout voltage (mv) 250 200 150 100 50 25 50 75 100 125 0 0 300 v out = 3.3v c out = 3.3 f psrr vs. frequency max6469 toc05 frequency (khz) psrr (db) 100 10 1 0.1 -50 -40 -30 -20 -10 0 -60 0.01 1000 v out = 3.3v c out = 3.3 f i load = 30ma region of stable c out esr vs. load current max6469 toc06 load current (ma) c out esr ( ? ) 250 200 150 100 50 1 2 3 4 5 0 0 300 c out = 4.7 f c out = 3.3 f stable region output noise max6469 toc07 500 s/div 100 v/div v in = 4.5v v out = 3.3v i load = 100ma 100 0 10 100 10k 100k output noise vs. frequency 20 40 80 60 max6469 toc08 frequency (hz) v rms ( v) 1k v in = 2.5v v out = 1.5v i out = 100ma shutdown response max6469 toc09 20ms/div v out 2v/div v shdn 5v/div i load = 50ma startup response max6469 toc10 10 s/div v in 2v/div v out 2v/div max6469 toc11 100 s/div v out 20mv/div load-transient response max6469 toc12 10 s/div v in = 5v v out = 3.3v i load = 100ma v out 5mv/div load-transient response near dropout t ypical operating characteristics (continued) (v in = 5v, v out = 3.3v, c out = 3.3?, t a = +25?, unless otherwise noted.)
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 6 _______________________________________________________________________________________ normalized output voltage vs. temperature max6469 toc17 temperature ( c) normalized output voltage 60 35 10 -15 0.994 1.000 1.006 1.012 0.988 -40 85 normalized to +25 c i load = 10ma i load = 150ma i load = 300ma max6469 toc13 100 s/div v out 20mv/div ac-coupled 5v 4.5v v in 500mv/div v out = 3.3v i load = 10ma line transient response max6469 toc14 200ms/div v in 1v to 4v 2v/div reset 2v/div reset delay response max6469 toc15 200ns/div mr 2v/div reset 2v/div reset response to mr max6469 toc16 200ms/div v out 2v/div reset 2v/div reset response to v in rising v in 5v/div t ypical operating characteristics (continued) (v in = 5v, v out = 3.3v, c out = 3.3?, t a = +25?, unless otherwise noted.)
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit _______________________________________________________________________________________ 7 max6469/max6470/max6477/max6478 pin description pin bump max6469/max6470 max6477/max6478 sot23 tdfn ucsp name function 1 1, 2 a1 in regulator input. bypass in to gnd with a 0.1? capacitor. 23 a2 gnd ground. this pin also functions as a heatsink. solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 34 a3 shdn active-low shutdown input. connect shdn to v in for normal operation. 45 c3 reset active-low reset output. reset remains low while v out is below the reset threshold. reset remains low for the duration of the reset timeout period after the reset conditions are terminated. reset is available in open-drain and push-pull configurations. 56 c2 set feedback input for externally setting the output voltage. connect set to gnd to select the preset output voltage. connect set to an external resistor-divider network for adjustable output operation. 6 7, 8 c1 out regulator output. bypass out to gnd with a minimum 3.3? low-esr capacitor. max6471/max6472/max6479/max6480 pin description pin bump max6471/max6472 max6479/max6480 sot23 tdfn ucsp name function 1 1, 2 a1 in regulator input. bypass in to gnd with a 0.1? capacitor. 23 a2 gnd ground. this pin also functions as a heatsink. solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 34 a3 mr active-low manual reset input. the reset output is asserted while mr is pulled low and remains asserted for the duration of the reset timeout period after mr transitions from low to high. leave mr unconnected or connect to v out if not used. mr has an internal pullup resistor of 40k ? ( typ) to v out . 45 c3 reset active-low reset output. reset remains low while v out is below the reset threshold or while mr is held low. reset remains low for the duration of the reset timeout period after the reset conditions are terminated. reset is available in open-drain and push-pull configurations. 56 c2 set feedback input for externally setting the output voltage. connect set to gnd to select the preset output voltage. connect set to an external resistor-divider network for adjustable output operation. 6 7, 8 c1 out regulator output. bypass out to gnd with a minimum 3.3? low-esr capacitor.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 8 _______________________________________________________________________________________ max6473/max6474/max6481/max6482 pin description pin bump max6473/max6474 max6481/max6482 sot23 tdfn ucsp name function 1 1, 2 a1 in regulator input. bypass in to gnd with a 0.1? capacitor. 23 a2 gnd ground. this pin also functions as a heatsink. solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 34 a3 shdn active-low shutdown input. connect shdn to v in for normal operation. 45 c3 reset active-low reset output. reset remains low while v out is below the reset threshold or while mr is held low. reset remains low for the duration of the reset timeout period after the reset conditions are terminated. reset is available in open-drain and push-pull configurations. 56 c2 mr active-low manual reset input. the reset output is asserted while mr is pulled low and remains asserted for the duration of the reset timeout period after mr transitions from low to high. leave mr unconnected or connect to v out if not used. mr has an internal pullup resistor of 40k ? ( typ) to v out . 6 7, 8 c1 out regulator output. bypass out to gnd with a minimum 3.3? (min) low-esr capacitor. max6475/max6476/max6483/max6484 pin description pin bump max6475/max6476 max6483/max6484 sot23 tdfn ucsp name function 1 1, 2 a1 in regulator input. bypass in to gnd with a 0.1? capacitor. 23 a2 gnd ground. this pin also functions as a heatsink. solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 34 a3 shdn active-low shutdown input. connect shdn to v in for normal operation. 45 c3 reset active-low reset output. reset remains low while fb is below the reset threshold. reset remains low for the duration of the reset timeout period after the reset conditions are terminated. reset is available in open-drain and push-pull configurations. 56 c2 fb feedback input for linear regulator controller or remote sense applications. connect fb to the external load (v cc ) to obtain the fixed output voltage. 6 7, 8 c1 out regulator output. bypass out to gnd with a minimum 3.3? low-esr capacitor.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit _______________________________________________________________________________________ 9 detailed description the max6469?ax6484 are ultra-low, quiescent cur- rent, low-dropout linear regulators with an integrated microprocessor reset circuit. these devices guarantee 300ma (min) drive capabilities and are available with preset output voltages in 100mv increments between +1.5v and +3.3v. the internal reset circuit monitors the regulator output voltage and asserts the reset output when the regulator output is below the microprocessor supply tolerance. regulator the regulator core operates with +2.5v to +5.5v input voltage range. the output voltage is offered in 100mv increments between +1.5v and +3.3v (contact factory for other output voltage options). the max6469 max6472/max6477?ax6480 offer an adjustable out- put voltage implemented with an external resistor- divider network between out, set, and gnd (figure 1). set must be connected to either gnd for fixed v out or to an external divider for adjustable v out . the max6469?ax6472/max6477?ax6480 automatically determine the feedback path depending on the con- nection of set. the typical operating circuit shows a typical connection for the max6469. out is an internal- ly regulated low-dropout (ldo) linear regulator that powers a microprocessor. reset circuit the reset supervisor circuit is fully integrated in the max6469?ax6484 and uses the same reference volt- age as the regulator. two supply tolerance reset thresholds, -7.5% and -12.5%, are provided for each type of device. -7.5% reset: reset does not assert until the regulator output voltage is at least -5% out of tolerance and always asserts before the regulator output voltage is -10% out of tolerance. -12.5% reset: reset does not assert until the regulator output voltage is at least -10% out of tolerance and always asserts before the regulator output voltage is -15% out of tolerance. reset output a ?? reset input starts the ? in a known state. the max6469?ax6484 ? supervisory circuits assert reset during power-up, power-down, and brownout conditions. reset asserts when the input voltage is below the undervoltage lockout threshold. reset asserts when v out is below the reset threshold and remains asserted for at least the minimum selected reset timeout period (t rp , table 3) after v in rises above the undervoltage lockout threshold and v out rises above the reset threshold. reset asserts when mr is pulled low (max6471?ax6474/max6479?ax6482). reset asserts when shdn is pulled low (max6469/ max6470/max6473?ax6478/max6481?ax6484). shutdown (max6469/max6470/max6473?ax6478/max6481 max6484 only) shdn allows the regulator to shut down, thereby reduc- ing the total i in consumption of the device. shdn pro- vides a digitally controlled active-low shutdown. in shutdown mode, the pass transistor, control circuit, and reference turn off to reduce the supply current to below 0.1?. connect shdn to in for normal operation. manual reset input (max6471?ax6474/max6479?ax6482 only) many ?-based products require manual reset capabil- ity, allowing the operator, a test technician, or external logic circuitry to initiate a reset. a logic low on mr asserts reset while the regulator output voltage is still within tolerance. reset remains asserted while mr is low and for the reset timeout period (t rp ) after mr returns high. the mr input has an internal pullup of 40k ? (typ) to out. mr can be driven with ttl/cmos logic levels or with open-drain/collector outputs. connect a normally open switch from mr to gnd to create a manual reset func- tion; external debounce circuitry is not required. if mr is driven from long cables or the device is used in a noisy environment, connect a 0.1? capacitor from mr to gnd to provide additional noise immunity. feedback input (max6475/max6476/max6483/max6484 only) the feedback input (fb) connects to an internal resistor- divider network ( functional diagram ). fb is not internally connected to v out , and as a result can be used to max6469?ax6472 max6477?ax6480 r1 r2 c out manual reset gnd in out set 2.5v to 5.5v (mr) ( ) are for max6471/max6472/max6479/max6480 only figure 1. adjustable output voltage configuration
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 10 ______________________________________________________________________________________ remotely sense the output voltage of the device. using fb with an external npn transistor, the current drive capability can be increased according to the following equation (figure 2): i out(total) = i out ? ( +1) the external npn pass transistor must meet specifica- tions for current gain, power dissipation, and collector current. the beta influences the maximum output cur- rent the circuit can deliver. the largest guaranteed out- put current is given by i load (max) = 300ma beta (min). the transistor? rated power dissipation must exceed the actual power dissipated in the transistor. the power dissipated (pd) equals the maximum load current (i load (max)) times the maximum input-to-out- put voltage differential: pd = i load (max) (v in (max) - v out ). the rated transistor collector current must exceed the maximum load current. reverse leakage protection reverse out to in current an internal circuit monitors the max6469?ax6484 input and output voltages. when the output voltage is greater than the input voltage, the internal in-to-out pass transistor and parasitic diode turn off. an external voltage applied to out does not reverse charge a bat- tery or power source applied to in (the leakage path from out to in is 0.01? typ). when the output voltage exceeds the input voltage, out powers the device and shutdown must be logic high (greater than 0.7 ? v out ). reset asserts until in exceeds out and out is above the specified v thout threshold (based on the selected or adjusted regulator out nominal voltage). reverse out to ground current the max6469?ax6484 maintain a low out-to-gnd reverse-current flow when the in power source is removed. when in floats (input battery removed) and shdn is pulled up to v out (by an external diode), the out-to-gnd current through the ldo is 40? (typ). the regulator output can be held up with an external super capacitor or backup battery at out until the in battery is replaced. the reset output is asserted while the in bat- tery is removed to place the system in a low-power mode. volatile memory content is maintained until the super capacitor or battery voltage drops below ram standby specifications. reset deasserts when the in battery has been replaced and out exceeds the desired reset threshold. for nonrechargeable backup battery applications, place a reverse diode between out and the backup battery (to prevent battery charg- ing). the external diode does not affect the regulator? dropout voltage because it is not between the ldo out- put and the processor/memory vcc supply. the diode can be replaced with a current-limiting resistor for rechargeable backup battery applications. current limit the max6469?ax6484 include an internal current- limit circuit that monitors and controls the pass transis- tor? gate voltage, limiting the output current to 450ma (min). the output can be shorted to ground indefinitely without damaging the part. thermal shutdown when the junction temperature (t j ) exceeds +180? (typ), the thermal sensor signals the shutdown logic, turning off the pass transistor and allowing the ic to figure 3. battery backup max6469 max6484 p memory out in shdn 3.0v lithium removable lithium ion or 3-cell alkaline removable lithium ion or 3-cell alkaline max6469 max6484 p memory out in shdn supercap 3.3 f 3.3 f figure 2. high-current, external transistor application max6475/max6476 max6483/max6484 r pullup 0.1 f 3.3 f 330 ? p 5.0v out fb reset gnd in v cc = 3.3v 1a total current
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ______________________________________________________________________________________ 11 cool. the thermal sensor turns the pass transistor on again after the ic? junction temperature cools by 20?, resulting in a pulsed output during continuous thermal overload conditions. thermal overload protection is designed to protect the max6469?ax6484 in the event of fault conditions. for continuous operation, do not exceed the absolute maximum junction temperature rating of t jmax = +150?. operating region and power dissipation the max6469?ax6484? maximum power dissipation depends on the thermal resistance of the case and cir- cuit board, the temperature difference between the die junction and the ambient air, and the rate of airflow. the power dissipation across the device is: p = i out (v in - v out ) the maximum power dissipation is: p max = (t j - t a ) / ( jb + ba ) where t j - t a is the temperature difference between the die junction and the surrounding air, jb (or jc ) is the thermal resistance of the package, and ba is the ther- mal resistance through the pc board, copper traces, and other materials to the surrounding air. the max6469?ax6476 tdfn package jc = 41?/w, and the max6469?ax6476 sot package jc = 110?/w. the max6469?ax6484? ground pin (gnd) performs the dual function of providing an electrical connection to the system ground and channeling heat away. connect gnd to the system ground using a large pad or ground plane. for continuous operation, do not exceed the absolute maximum junction temperature rating of t jmax = +150?. applications information output voltage selection the max6469?ax6484 feature dual-mode operation: they operate in either a preset output voltage mode or an adjustable mode. in preset voltage mode, internal feedback resistors set the max6469?ax6484? output from +1.5v to +3.3v (table 1). select this mode by con- necting set to ground (max6469?ax6472/ max6477?ax6480). in adjustable mode, select an output between 1.25v and 5.5v using two external resistors connected as a voltage-divider to set (figure 1). the output voltage is set by the following equation: v out = v set (1 + r 1 / r 2 ) where v set = 1.23v. to simplify resistor selection: r 1 = r 2 (v out / v set - 1) choose r2 = 50k ? to maintain stability, accuracy and high-frequency power-supply rejection. avoid selecting resistor values greater than 100k ? . in preset voltage mode, the impedance between set and ground should always be less than 50k ? . in most applications, con- nect set directly to ground. low-noise ucsp output max6477?ax6484 ucsp products include internal fil- tering to yield low output noise without an additional external bypass capacitor. the devices yield 75? rms (typ) output noise (for v out = 3.0v) and 150? rms (for v out = 3.3v). this low-noise feature makes the max6477?ax6484 ideal for audio applications. capacitor selection and regulator stability for stable operation over the full temperature range and with load currents up to 300ma, use a 3.3? (min) ceramic output capacitor with an esr <0.2 ? . to reduce noise and improve load transient response, sta- bility, and power-supply rejection, use large output capacitor values such as 10?. note that some ceramic capacitors exhibit large capac- itance and esr variation with temperature. with capaci- tor dielectrics such as z5u and y5v, use 4.7? or more to ensure stability over temperature. with x7r or x5r capacitor dielectrics, 3.3f should be sufficient at all operating temperatures. higher esr capacitors require more capacitance to maintain stability. a graph of the region of stable esr vs. load current is shown in the typical operating characteristics . to improve power-supply rejection and transient response, use a 1? capacitor between in and gnd. the max6469?ax6484 remain stable with purely resistive loads or current loads up to 300ma. reset transient immunity the reset circuit is relatively immune to short-duration, falling v out transients. the typical operating characteristics section shows a graph of the maximum transient duration vs. reset threshold overdrive for which reset is not asserted. the graph was produced using falling v out transients starting at v out and end- ing below the reset threshold by the magnitude indicat- ed (reset threshold overdrive). the graph shows the maximum pulse width that a falling v out transient can typically have without triggering a reset pulse. as the amplitude of the transient increases (i.e., goes further below the reset threshold), the maximum allowable pulse width decreases. typically, a v out transient that goes only 10mv below the reset threshold and lasts for 75? does not trigger a reset pulse.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 12 ______________________________________________________________________________________ power dissipation consideration for the sot23 package, any pin except the set pin can be used as a heatsink. if the set pin is used as a heatsink, excessive parasitic capacitance can affect stability. for the tdfn package, the exposed metal pad on the back side of a package connects to gnd of the chip. this metal pad can be used as a heatsink. ucsp consideration for general ucsp package information and pc layout considerations, refer to maxim application note: wafer- level chip-scale package . ucsp reliability the chip-scale package (ucsp) represents a unique packaging form factor that might not perform equally to a packaged product through traditional mechanical reliability tests. csp reliability is integrally linked to the user? assembly methods, circuit-board material, and usage environment. the user should closely review these areas when considering a csp package. performance through operating life test and moisture resistance remains uncompromised, because it is pri- marily determined by the wafer-fabrication process. mechanical stress performance is a greater considera- tion for a csp package. csps are attached through direct solder contact to the user? pc board, forgoing the inherent stress relief of a packaged product? lead frame. solder-joint contact integrity must be considered. information on maxim? qualification plan, test data, and recommendations are detailed in the ucsp application note on maxim? website at www.maxim-ic.com. suffix output voltage (v) 15 1.5 16 1.6 17 1.7 18 1.8 19 1.9 20 2.0 21 2.1 22 2.2 23 2.3 24 2.4 25 2.5 26 2.6 27 2.7 28 2.8 285 2.85 29 2.9 30 3.0 31 3.1 32 3.2 33 3.3 table 1. output voltage suffix guide note: factory-trimmed custom output voltages may be avail- able; contact factory for availability. suffix v out reset tolerance (%) a -7.5 b -12.5 table 2. reset threshold accuracy guide suffix minimum reset timeout period (ms) d1 2.5 d2 20 d3 150 d4 1200 table 3. reset timeout delay guide
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ______________________________________________________________________________________ 13 device top mark max6469 ta15bd3 ado max6469ta18ad3 adp max6469ta25bd3 adq max6469ta28ad3 act max6469ta30bd3 adr max6469ta33ad3 ads max6469ut15bd3 abks max6469ut18ad3 abkt max6469ut25bd3 abku max6469ut28ad3 abff max6469ut285ad3 abmz max6469ut285bd3 abna max6469ut30bd3 abkv max6469ut33ad3 abkw max6470 ta15bd3 adt max6470ta18ad3 adu max6470ta25bd3 adv max6470ta28ad3 adw max6470ut285ad3 abnb max6470ut285bd3 abnc max6470ta30bd3 ady max6470ta33ad3 acu max6470ut15bd3 abkx max6470ut18ad3 abky max6470ut25bd3 abkz max6470ut28ad3 abla max6470ut30bd3 ablb max6470ut33ad3 ablc max6471 ta15ad3 adz max6471ta18bd3 aea max6471ta25ad3 aeb max6471ta28bd3 aec max6471ta30ad3 aed max6471ta33bd3 aee max6471ut15ad3 abld max6471ut18bd3 able max6471ut25ad3 ablf table 4. standard versions device top mark max6471ut28bd3 ablg max6471ut30ad3 ablh max6471ut33bd3 abli max6472 ta15ad3 aef max6472ta18bd3 acw max6472ta25ad3 aeg max6472ta28bd3 aeh max6472ta30ad3 aei max6472ta33bd3 aej max6472ut15ad3 ablj max6472ut18bd3 abfi max6472ut25ad3 ablk max6472ut28bd3 abll max6472ut30ad3 ablm max6472ut33bd3 abln max6473 ta15ad3 aek max6473ta18bd3 ael max6473ta25ad3 aem max6473ta28bd3 aen max6473ta30ad3 aeo max6473ta33bd3 aep max6473ut15ad3 ablo max6473ut18bd3 ablp max6473ut25ad3 ablq max6473ut28bd3 ablr max6473ut30ad3 abls max6473ut33bd3 ablt max6474 ta15ad3 aeq max6474ta18bd3 aer max6474ta25ad3 aes
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 14 ______________________________________________________________________________________ device top mark max6474ta28bd3 aet max6474ta30ad3 aeu max6474ta33bd3 aev max6474ut15ad3 ablu max6474ut18bd3 ablv max6474ut25ad3 ablw max6474ut28bd3 ablx max6474ut30ad3 ably max6474ut33bd3 ablz max6475 ta15bd3 aew max6475ta18ad3 aex max6475ta25bd3 aey max6475ta28ad3 aez max6475ta30bd3 afa max6475ta33ad3 acz max6475ut15bd3 abma max6475ut18ad3 abmb max6475ut25bd3 abmc max6475ut28ad3 abmd max6475ut30bd3 abme max6475ut33ad3 abfl max6476 ta15bd3 afb max6476ta18ad3 afc max6476ta25bd3 afd max6476ta28ad3 afe max6476ta30bd3 aef max6476ta33ad3 afg max6476ut15bd3 abmf max6476ut18ad3 abmg max6476ut25bd3 abmh max6476ut28ad3 abmi max6476ut30bd3 abmj max6476ut33ad3 abmk max6477 bl15bd3 abw max6477bl18ad3 abg max6477bl25bd3 abx max6477bl28ad3 aby max6477bl30bd3 abz max6477bl33ad3 aca max6478 bl15bd3 acb max6478bl18ad3 acc max6478bl25bd3 acd table 4. standard versions (continued) device top mark max6478bl28ad3 ace max6478bl30bd3 acf max6478bl33ad3 acg max6479 bl15ad3 ach max6479bl18bd3 aci max6479bl25ad3 acj max6479bl28bd3 ack max6479bl30ad3 acl max6479bl33bd3 acm max6480 bl15bd3 acn max6480bl18ad3 aco max6480bl25bd3 acp max6480bl28ad3 acq max6480bl30bd3 acr max6480bl33ad3 abj max6481 bl15bd3 acs max6481bl18ad3 act max6481bl25bd3 acu max6481bl28ad3 acv max6481bl30bd3 acw max6481bl33ad3 acx max6482 bl15bd3 acy max6482bl18ad3 acz max6482bl25bd3 ada max6482bl28ad3 adb max6482bl30bd3 adc max6482bl33ad3 add max6483 bl15bd3 ade max6483bl18ad3 adf max6483bl25bd3 adg max6483bl28ad3 adh max6483bl30bd3 adi max6483bl33ad3 adj max6484 bl15bd3 adk max6484bl18ad3 adl max6484bl25bd3 adm max6484bl28ad3 adn max6484bl30bd3 ado max6484bl33ad3 adp sample stock is generally available on standard versions only. standard versions require a minimum order increment of 2.5k units. nonstandard versions must be ordered in 10k-unit incre- ments. contact factory for availability.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ______________________________________________________________________________________ 15 top view ucsp devices shown as mounted on pc board. ball soldered down. gnd reset shdn 16 out 5 set in max6469 max6470 sot23-6 2 34 gnd reset shdn 16 out 5mr in max6473 max6474 sot23-6 2 34 gnd reset shdn 16 out 5fb in max6475 max6476 sot23-6 2 34 set shdn reset in gnd out max6477 max6478 3 x 3 ucsp tdfn max6469 max6470 tdfn max6471 max6472 tdfn max6473 max6474 tdfn max6475 max6476 shdn 1 2 in gnd in 3 4 set reset 8 7 out out 6 5 mr 1 2 in gnd in 3 4 set reset 8 7 out out 6 5 shdn 1 2 in gnd in 3 4 mr reset 8 7 out out 6 5 shdn 1 2 in gnd in 3 4 fb reset 8 7 out out 6 5 c1 c2 c3 a1 a3 a2 set mr reset in gnd out max6479 max6480 3 x 3 ucsp c1 c2 c3 a1 a3 a2 mr shdn reset in gnd out max6481 max6482 3 x 3 ucsp c1 c2 c3 a1 a3 a2 fb shdn reset in gnd out max6483 max6484 3 x 3 ucsp c1 c2 c3 a1 a3 a2 gnd reset mr 16 out 5 set in max6471 max6472 sot23-6 2 34 pin configurations
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 16 ______________________________________________________________________________________ 1.23v reverse leakage protection mos driver with current limit reset timeout output stage thermal sensor in shdn* out gnd reset reset comparator error amp 185mv set** feedback-mode comparator mr*** max6469?ax6474 max6477?ax6482 *max6469/max6470/max6473?ax6478/max6481?ax6484 **max6469?ax6472/max6477?ax6480 ***max6471?ax6474/max6479?ax6482 functional diagrams 1.23v reverse leakage protection mos driver with current limit reset timeout output stage thermal sensor in shdn reset fb out gnd reset comparator error amp max6475/max6476 max6483/max6484 p out in shdn reset set gnd gnd reset v cc 3.3 f 2.5v to 5.5v max6469/max6470 max6477/max6478 t ypical operating circuit chip information transistor count: 1041 process: bicmos
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ______________________________________________________________________________________ 17 part temp range pin- package max6471 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6471ta_ _ _d_* -40? to +85? 8 tdfn max6472 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6472ta_ _ _d_* -40? to +85? 8 tdfn max6473 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6473ta_ _ _d_* -40? to +85? 8 tdfn max6474 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6474ta_ _ _d_* -40? to +85? 8 tdfn max6475 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6475ta_ _ _d_* -40? to +85? 8 tdfn max6476 ut_ _ _d_-t -40? to +85? 6 sot23-6 max6476ta_ _ _d_* -40? to +85? 8 tdfn max6477 bl_ _ _d_-t -40? to +85? 6 ucsp max6478 bl_ _ _d_-t -40? to +85? 6 ucsp max6479 bl_ _ _d_-t -40? to +85? 6 ucsp max6480 bl_ _ _d_-t -40? to +85? 6 ucsp max6481 bl_ _ _d_-t -40? to +85? 6 ucsp max6482 bl_ _ _d_-t -40? to +85? 6 ucsp max6483 bl_ _ _d_-t -40? to +85? 6 ucsp max6484 bl_ _ _d_-t -40? to +85? 6 ucsp ordering information (continued) note: the first ? _ are placeholders for the output voltage levels of the devices. desired output voltages are set by the suffix found in the output voltage suffix guide (table 1). the third ??is a placeholder for the reset threshold accuracy. desired reset threshold accuracy is set by the suffix found in the reset threshold accuracy guide (table 2). the ??following the d is a placeholder for the reset timeout delay time. desired reset timeout delay time is set by the suffix found in the reset timeout delay guide (table 3). for example, the max6481bl30bd4-t has a 3.0v output voltage, 12.5% reset threshold tolerance, and a 1200ms (min) reset timeout delay. sample stock is generally avail- able on standard versions only (table 4). standard versions require a minimum order increment of 2.5k units. nonstandard versions must be ordered in 10k-unit increments. contact factory for availability. * future product?ontact factory for availability.
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit 18 ______________________________________________________________________________________ part set shdn mr fb push-pull reset open-drain reset package max6469 ? sot23-6/8-tdfn max6470 ? sot23-6/8-tdfn max6471 sot23-6/8-tdfn max6472 sot23-6/8-tdfn max6473 ? sot23-6/8-tdfn max6474 ? sot23-6/8-tdfn max6475 ? sot23-6/8-tdfn max6476 sot23-6/8-tdfn max6477 ? ? x 3 ucsp b9-3 max6478 ? 3 x 3 ucsp b9-3 max6479 ? x 3 ucsp b9-3 max6480 3 x 3 ucsp b9-3 max6481 ? ? x 3 ucsp b9-3 max6482 ? 3 x 3 ucsp b9-3 max6483 ? ? x 3 ucsp b9-3 max6484 3 x 3 ucsp b9-3 selector guide
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit ______________________________________________________________________________________ 19 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 6lsot.eps f 1 1 21-0058 package outline, sot-23, 6l 9lucsp, 3x3.eps i 1 1 21-0093 package outline, 3x3 ucsp
max6469?ax6484 300ma ldo linear regulators with internal microprocessor reset circuit maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. pa cka ge information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 6, 8, &10l, dfn thin.eps proprietary information title: approval document control no. rev. 2 1 package outline, 6, 8 & 10l, tdfn, exposed pad, 3x3x0.80 mm 21-0137 d l c l c semiconductor dallas a2 a pin 1 index area d e a1 d2 b e2 [(n/2)-1] x e ref. e k 1 n 1 l e l a l pin 1 id c0.35 detail a e number of leads shown are for reference only document control no. approval title: proprietary information rev. 2 2 common dimensions symbol min. max. a 0.70 0.80 d 2.90 3.10 e 2.90 3.10 a1 0.00 0.05 l 0.20 0.40 pkg. code 6 n t633-1 1.500.10 d2 2.300.10 e2 0.95 bsc e mo229 / weea jedec spec 0.400.05 b 1.90 ref [(n/2)-1] x e 1.500.10 mo229 / weec 1.95 ref 0.300.05 0.65 bsc 2.300.10 t833-1 8 package variations 21-0137 0.250.05 2.00 ref mo229 / weed-3 0.50 bsc 1.500.10 2.300.10 10 t1033-1 0.25 min. k a2 0.20 ref. d semiconductor dallas package outline, 6, 8 & 10l, tdfn, exposed pad, 3x3x0.80 mm


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